Managing Thermal-Induced Stress In Chips

Heterogeneous integration and increasing density at advanced nodes are creating some complex and difficult challenges for IC manufacturing and packaging. Chip Greely, vice president of engineering at Promex, offered insights into this issue to Semiconductor...

Bump Reliability is Challenged By Latent Defects

Thermal stress is a well-known problem in advanced packaging, along with the challenges of mechanical stress. Both are exacerbated by heterogenous integration, which often requires mingling materials with incompatible coefficients of thermal expansion (CTE). Chip...

Unknowns And Challenges In Advanced Packaging

Dick Otte, CEO of Promex Industries, sat down with Semiconductor Engineering to talk about unknowns in material properties, the impact on bonding, and why environmental factors are so important in complex heterogeneous packages. What follows are excerpts of that...

The Path To Known Good Interconnects

Chiplets and heterogenous integration (HI) provide a compelling way to continue delivering improvements in performance, power, area, and cost (PPAC) as Moore’s Law slows, but choosing the best way to connect these devices so they behave in consistent and predictable...