As chips are disaggregated into chiplets, more features are being added into these devices that chipmakers were unable to include in the past due to reticle size limits and the high cost of scaling everything to the latest process node. This has opened the door to new architectures, new materials such as glass substrates, and a variety of new challenges. In this Semiconductor Engineering article, Dick Otte, president and CEO of Promex Industries, discusses warpage, through-glass vias, an increase in analog components, photonic ICs, and other trends and challenges that engineers need to consider in future designs.